LLVM Compiler for RISC-V Architecture A Unique Approach to Vectorization (Maker Innovations Series) [#1012402]

LLVM Compiler for RISC-V Architecture: A Unique Approach to Vectorization (Maker Innovations Series)
English | 2026 | ISBN: B0FRRMY52T | 319 pages | PDF | 4.08 MB
This book offers a comprehensive introduction to the RISC-V RVV extension and its integration with LLVM-based compilers. It covers the LLVM VPlan-based Loop Vectorizer and SLP Vectorizer, along with additional insights into the clang frontend, OpenMP support, and RVV-specific clang directives provided by SiFive.
Given the limited information currently available on RVV and its support in modern compilers, this book fills a crucial gap. RVV introduces a unique approach to vectorization―Vector Length Agnostic (VLA) vectorization―which stands out from the fixed vectors of x86 and the runtime-defined, yet fixed, ARM-based SVE and SVE2 extensions.
Readers will gain an understanding of RVV-specific VLA-based vectorization support in LLVM-based compilers, which are still under development. The book also provides early insights into the ongoing support for RVV in LLVM.
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